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Final BOM

The complete prototype bill of materials for Board P and Board L — every part with a lookup-verified LCSC number, JLCPCB tier, stock, and the Extended-part fee arithmetic that dominates the order cost.

This is the final BOM, not a candidate list. Every C-number below was re-verified individually against the local JLCPCB parts database (snapshot dated 2026-07-25; per-part data-fetch dates within the snapshot range from 2026-05-23 to 2026-07-03). The XFCN JOUT1/J2 mating pair was separately checked against live JLCPCB/LCSC inventory and manufacturer drawings on 2026-08-20; its rows carry that date.

This page intentionally covers the two assembled lamp boards. The separate ST-LINK/V2 SWD adapter has only two hand-fit/DNP connector lines, C4749199 and C492404; their current identity and evidence live in the component catalog rather than the lamp-PCBA cost arithmetic below.

Every fitted line below also has a canonical component record — the exact orderable identity, every board placement, the sources behind it and which coverage domains are still open. Browse them in the component catalog; the cross-component rules that span several of these parts at once are on the integration page. This page keeps the ordering, tier and cost reasoning, which lives nowhere else.

Stock is a point-in-time read

Stock figures are from the snapshot, not a guarantee. Re-check every line immediately before ordering — and pay particular attention to the four lines flagged below with stock under 25,000. Tier assignments (Basic / Preferred / Extended) can also change; the fee arithmetic at the bottom of this page is only as good as the tier data on the day you order.

Low-profile control replacement (2026-09-06)

RefQtySelected partDated JLCPCB stock / order quantity
RV11ALPS RK10J11E0034 / C4706436,939 / 6,677
SW21G-Switch SS-12D01-G020 / C54468033,709 / 3,698

Both controls replace the prior EC11 encoder and Dailywell toggle. Stock is a dated observation, not a reservation. ALPS specifies manual soldering and insertion (t:2 mm); supplier listing availability does not approve this board's assembly. Verify seating/retention and soldering on the 1.6 mm PCB with the assembler.

R22 changes to 100 kΩ C25803; R27 remains 100 Ω C22775 and C22 remains 100 nF C14663. R23, R28 and C23 are removed. Four RV1 dummy/support terminals remain unconnected. Refresh the BOM/CPL and quote from the revised design rather than reusing the old stock and Extended-fee snapshot below. See rear controls.

Board P — USB-PD front end

Adopted unchanged from the power-section audit.

RefQtyPartLCSCPackageTierStockRole
U11STUSB4500QTRC2678061QFN-24-EP 4x4Extended4,562PD sink controller
Q11AO3401AC347476SOT-23Extended862,120Load switch (P-FET)
J11TYPE-C-31-M-17C2835406P SMD right-angleExtended33,876Primary 20 V/5 A rating; project numeric contact mapping/incoming continuity OPEN
D51SMAJ20AC571370SMAExtended3,770Primary VRWM 20 V; numeric pad/orientation and actual clamp waveform OPEN
C11CL31A106KBHNNNE 10 µF 50 VC135851206Basic1,877,266VDD bulk
C2, C352CC0603KRX7R9BB104 100 nF 50 VC146630603Basic12,618,106VDD HF decouple, gate–source soft-start. The C1711 → C14663 swap recommended on the Board P page was applied at KiCad capture — one Extended line removed, reel shared with Board L
C30, C342CL10A105KB8NNNC 1 µF 50 VC158490603Basic5,979,916VREG decoupling
R111100 kΩ ±1%C258030603Basic7,990,119Gate pull-up (default OFF); shares Board L's R26 reel
R121150 kΩ ±1%C228070603Basic414,154Gate series — re-ratioed from 56 kΩ by the design review to keep V_GS inside ±12 V at a 20 V mis-contract
R13, R142470 Ω ±1%C231790603Basic1,899,614DISCH + pin-18 series
R15, R1624.7 kΩ ±1%C231620603Basic7,433,362I2C pull-ups
R19, R2020 ΩC211890603Basic6,153,233CC1DB/CC2DB bridges
R21110 kΩ ±1%C174140805Basic10,726,008RESET pull-down (run state); shares Board L's reel. Added by the design review with the J2.4 reset line
JOUT11PZ254V-11-06P maleC492405THT 1x6, 2.54 mmExtended98,021 (live 2026-08-20)Direct Board L interface; unkeyed, verify pin 1
J2, J3Pogo pads 1x4 / 1x8Bare copperNVM I2C + debug, no part

DNP — footprint only, not populated:

RefPartLCSCPackageTierStockNote
R17, R185.1 kΩ ±1%C231860603Basic3,775,920External Rd — rework insurance only, never populate on a powered build
D6, D7PESD24VS1UBC85382SOD-523Extended109,452CC-line ESD, enclosed/production builds only

Board L — driver, control, LED array

RefQtyPartLCSCPackageTierStockRole
U21AL8860MP-13C500782MSOP-8-EPExtended4,000CC buck LED driver, 4.5–40 V, 1.5 A
U31STM32G031F8P6C529334TSSOP-20Extended12,551Control MCU, Cortex-M0+, 64 KB
U41AP63203WU-7C780769TSOT-23-6Extended11,3923.3 V synchronous buck, 3.8–32 V
D101SMAJ20AC571370SMAExtended3,770Local 15 V input TVS; numeric pad/orientation and actual waveform OPEN
D111SS26C7420363SMAPreferred282,808Catch diode, 60 V/2 A Schottky
L11FXL0630-330-M 33 µHC177245SMD 7x6.6 mmExtended228,367LED buck inductor, 2.1 A max-design Isat (retained value; the 2.5 A figure is a typical-labeled catalogue column), 310 mΩ
L21FNR4030S4R7MT 4.7 µHC167874SMD 4x4 mmExtended252,195Logic buck inductor, shielded, 78 mΩ
RS11RLP25FEER200 200 mΩ ±1% 2 WC4596742512Extended20,654High-side sense → 500 mA
R30–R37833 Ω ±1% 1 WC29340702512Extended85,468Per-string ballast — upsized from a 250 mW 1206 by the design review (the 1206 exceeded its rating at the worst-case 90 mA string)
R20, R24, R25310 kΩ ±1%C174140805Basic10,726,008CTRL filter series, PDOK/ATT pull-ups
R22, R262100 kΩ ±1%C258030603Basic7,990,119Brightness ADC pull-down and NTC divider top — R26 moved off the 10 kΩ line by the design review; the outgoing 10 kΩ divider exceeded the NTC's 0.1 mA maximum operating current by 68%. Shares Board P's R11 reel
R271100 Ω ±1%C227750603Basic7,325,193Brightness wiper series resistor
R21133 kΩ ±1%C42160603Basic696,981CTRL pull-down + divider (default-OFF)
C10, C11, C12, C144CL31A106KBHNNNE 10 µF 50 VC135851206Basic1,877,266Input bulk + both buck input caps
C13, C15, C18, C20–C22, C247CC0603KRX7R9BB104 100 nF 50 VC146630603Basic12,618,106HF decouple, BST, NRST, CTRL filter, brightness ADC filter, NTC filter
C16, C172CL21A226MAQNNNE 22 µF 25 VC457830805Basic1,734,7893.3 V output caps per DS41326 Table 2
C191CL10A105KB8NNNC 1 µF 50 VC158490603Basic5,979,916MCU VDD bulk
RT11NCP18XH103F03RB 10 kΩ B=3380 KC135640603Extended398,625NTC, placed inside the LED array
F11BSMD1206-075-30VC9763051206Extended73,979PPTC, 750 mA hold / 1.5 A trip / 30 V
J21PM254V-11-06-H85 femaleC2832269THT 1x6, 2.54 mmExtended42,315 (live 2026-08-20)Direct mate for Board P JOUT1; mirrors its pin map
RV11RK10J11E0034C470643Insertion, low-profile wheelVerify quote6,939Single-unit 10 kΩ ±30%; 270°±10° stops
SW21SS-12D01-G020C5446803THT short slide switchVerify quote3,709Maintained SPDT, 1 A at 24 V DC
LED1–LED2424HL-AM-2835H421W-S1-08-HR3 (2800–3100 K)C210315SMD2835-2PExtended399,8133000 K, CRI 80, 29 lm typ @ 60 mA

Footprint only — not in the assembly BOM:

RefSuggested partLCSCPackageTierStockNote
J3PZ254V-11-05P 1x5PC492404THT 2.54 mmExtended251,600SWD. Hand-fit a pin strip during bring-up rather than paying an Extended fee for a debug-only connector — the same reasoning that put pogo pads on Board P
J4Pogo pads 1x3Bare copperUART debug, no part — same bare-copper style as Board P's J2/J3

Sourcing risks

Four lines carry stock low enough to matter on a small order. None is a design flaw — they are the specialty parts — but each needs a re-check before ordering.

PartStockRisk and fallback
D5 / D10 SMAJ20A (C571370)3,770, and two boards need itLowest-stock line in the whole design. Do not make a same-name or different-standoff substitution: exact vendor identity, conditioned clamp table, pad orientation, and both rail waveforms must be re-audited in the ratings analysis and against the canonical record (rec-high-diode-smaj20a)
U2 AL8860MP-13 (C500782) — canonical record rec-al8860mp-134,000Fine for a prototype run. AL8860WT-7 (TSOT-25) is pin-compatible in function but showed 0 stock and is limited to 1 A — it would still cover this design's 500 mA if the MSOP part disappears
RV1 RK10J11E0034 / C4706436,939Current stopped-pot choice; do not substitute an encoder without circuit/firmware revision
RS1 RLP25FEER200 (C459674)20,654Any 200 mΩ ±1% 2512 sense resistor rated 1 W or better substitutes directly; the value, not the manufacturer, is what sets 500 mA — see fact-rlp25-resistance

Extended-part fee economics

JLCPCB charges a one-time setup fee — ~¥470 (roughly $3) — per unique Extended part number, per order. Basic and Preferred parts do not incur it. The fee is per order, so a part used on both boards is charged twice when the boards are ordered as two separate PCBA jobs, which they must be.

Board PBoard L
Unique fitted part numbers1422
of which Basic98
of which Preferred01
of which Extended513

Board P Extended lines: C2678061, C347476, C283540, C571370, C492405 — one fewer than the original plan, because the C1711 → C14663 100 nF swap was applied.

Board L Extended lines: C500782, C529334, C780769, C571370, C177245, C167874, C459674, C2934070, C13564, C976305, C2832269, C2991196, C210315.

Value
Extended lines charged5 + 13 = 18
Setup fee total18 x ¥470 ≈ ¥8,460 (roughly $54)
Component cost, both boards, single-unit quantityroughly $8

The setup fees are about seven times the parts cost. That is the shape of every small JLCPCB PCBA order and it is worth internalising before optimising anything else: one avoided Extended line saves more than the entire resistor and capacitor content of both boards combined. It also amortises to nothing on a reorder — a second batch of the same design pays no setup fee at all.

Two reductions were already taken:

  • Board L's 10 µF caps use C13585 (1206, Basic) rather than the 1210 X7R part the driver research listed (C2918502, Extended). Saves ¥470 and shares a reel with Board P. The trade is X5R instead of the X7R the AL8860 datasheet asks for — X5R is rated to +85 °C, which covers this lamp's envelope, but if a build shows input ripple problems, C2918502 is the datasheet-strict swap.

  • Both boards' 100 nF caps now share C14663 (0603, Basic). Board P originally specified C1711 (0805, Extended); the swap was applied at KiCad capture and is already counted in the arithmetic above.

Two more are available if the budget matters:

  • Dropping RT1 (NTC) and F1 (PPTC) would save ¥940 and remove the thermal-derate and over-current protections. Both were added deliberately; this is the price of them.

  • Ordering both boards as a single panelised PCBA job, if JLCPCB permits it for the design, would collapse the shared C571370 TVS line from two charges to one — ¥470 saved. The two connector halves are different orderables and do not collapse.

Parts explicitly not on this BOM

Not presentWhy
Aluminum MCPCB / heatsink0.19 W per LED site is well inside the plain-FR-4 regime — see board split
Status LEDWould add current to the logic rail for information the lamp itself already conveys
Crystal oscillatorHSI16 + PLL at 64 MHz is far more accurate than anything this design's timing needs
BOOT0 strapping resistorThe factory-default option bit nBOOT_SEL = 1 makes the G0 boot from flash and ignore the BOOT0 pin entirely (the pin is only consulted if nBOOT_SEL is cleared) — so no strap is needed, but flipping nBOOT_SEL in firmware would change that
External Rd on CC linesDeliberately DNP — the single most consequential rule from zudo-pd's diagnosis
SWD/UART connectorsFootprint only; hand-fit for bring-up

Revision History

CreatedUpdated